| 2026 | ASPDAC | CombRewriter: Enabling Combinational Logic Simplification in MLIR-Based Hardware Compiler. | Haisheng Zheng, Zhuolun He, Shuo Yin, Yuzhe Ma, Bei Yu |
| 2026 | DATE | MAEDA: An LLM-Powered Multi-Agent Evaluation Framework for EDA Tool Documentation QA. | Zhenghao Chen, Yuan Pu, Hairuo Han, Yuntao Nie, Jiajun Qin, Yuhan Qin, Tairu Qiu, Zhuolun He, Jianwang Zhai, Bei Yu, Kang Zhao |
| 2025 | ACL | Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts. | Haoyuan Wu, Rui Ming, Haisheng Zheng, Zhuolun He, Bei Yu |
| 2025 | DAC | Swift or Exact? Boosting Efficient Microarchitecture DSE via Multi-fidelity Partial Order Prediction. | Hang Liu, Hao Geng, Zhuolun He, Qi Sun, Cheng Zhuo |
| 2025 | DAC | ChatLS: Multimodal Retrieval-Augmented Generation and Chain-of-Thought for Logic Synthesis Script Customization. | Haisheng Zheng, Haoyuan Wu, Zhuolun He |
| 2025 | DATE | iRw: An Intelligent Rewriting. | Haisheng Zheng, Haoyuan Wu, Zhuolun He, Yuzhe Ma, Bei Yu |
| 2025 | ICCAD | MM-GRADE: A Multi-Modal EDA Tool Documentation QA Framework Leveraging Retrieval Augmented Generation. | Yuan Pu, Zhuolun He, Shutong Lin, Jiajun Qin, Xinyun Zhang, Hairuo Han, Haisheng Zheng, Yuqi Jiang, Cheng Zhuo, Qi Sun, David Z. Pan, Bei Yu |
| 2025 | ICCAD | GPU Acceleration for Versatile Buffer Insertion. | Yuan Pu, Yuhao Ji, Siying Yu, Zuodong Zhang, Zizheng Guo, Zhuolun He, Yibo Lin, David Z. Pan, Bei Yu |
| 2025 | NAACL | Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation. | Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu |
| 2024 | ASPDAC | LSTP: A Logic Synthesis Timing Predictor. | Haisheng Zheng, Zhuolun He, Fangzhou Liu, Zehua Pei, Bei Yu |
| 2024 | DAC | PDRC: Package Design Rule Checking via GPU-Accelerated Geometric Intersection Algorithms for Non-Manhattan Geometry. | Jiaxi Jiang, Lancheng Zou, Wenqian Zhao, Zhuolun He, Tinghuan Chen, Bei Yu |
| 2024 | DAC | Lesyn: Placement-aware Logic Resynthesis for Non-Integer Multiple-Cell-Height Designs. | Yuan Pu, Fangzhou Liu, Yu Zhang, Zhuolun He, Yibo Lin, Kai-Yuan Chao, Bei Yu |
| 2024 | DATE | CBTune: Contextual Bandit Tuning for Logic Synthesis. | Fangzhou Liu, Zehua Pei, Ziyang Yu, Haisheng Zheng, Zhuolun He, Tinghuan Chen, Bei Yu |
| 2024 | EMNLP | Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks. | Haoyuan Wu, Haisheng Zheng, Zhuolun He, Bei Yu |
| 2024 | ICCAD | Customized Retrieval Augmented Generation and Benchmarking for EDA Tool Documentation QA. | Yuan Pu, Zhuolun He, Tairu Qiu, Haoyuan Wu, Bei Yu |
| 2023 | AAAI | AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution. | Yuxuan Zhao, Qi Sun, Zhuolun He, Yang Bai, Bei Yu |
| 2023 | DAC | OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration. | Zhuolun He, Yihang Zuo, Jiaxi Jiang, Haisheng Zheng, Yuzhe Ma, Bei Yu |
| 2023 | DATE | Efficient Design Rule Checking with GPU Acceleration. | Wei Zhong, Zhenhua Feng, Zhuolun He, Weimin Wang, Yuzhe Ma, Bei Yu |
| 2023 | ICCAD | Invited Paper: Heterogeneous Acceleration for Design Rule Checking. | Zhuolun He, Bei Yu |
| 2023 | ICCAD | AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search. | Zehua Pei, Fangzhou Liu, Zhuolun He, Guojin Chen, Haisheng Zheng, Keren Zhu, Bei Yu |
| 2022 | DAC | Functionality matters in netlist representation learning. | Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Bei Yu, Yu Huang |
| 2022 | ICCAD | X-Check: CPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms. | Zhuolun He, Yuzhe Ma, Bei Yu |
| 2021 | ASPDAC | Physical Synthesis for Advanced Neural Network Processors. | Zhuolun He, Peiyu Liao, Siting Liu, Yuzhe Ma, Yibo Lin, Bei Yu |
| 2021 | ICCAD | Graph Learning-Based Arithmetic Block Identification. | Zhuolun He, Ziyi Wang, Chen Bai, Haoyu Yang, Bei Yu |
| 2020 | ICCD | Learn to Floorplan through Acquisition of Effective Local Search Heuristics. | Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong |
| 2018 | FCCM | FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos. | Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, Guojie Luo |
| 2017 | FPGA | FPGA Acceleration for Computational Glass-Free Displays. | Zhuolun He, Guojie Luo |