| 2019 | Shield Synthesis for Real: Enforcing Safety in Cyber-Physical Systems. | Meng Wu, Jingbo Wang, Jyotirmoy Deshmukh, Chao Wang |
| 2019 | Scalable Translation Validation of Unverified Legacy OS Code. | Amer Tahat, Sarang Joshi, Pronnoy Goswami, Binoy Ravindran |
| 2019 | TSNSCHED: Automated Schedule Generation for Time Sensitive Networking. | Aellison Cassimiro T. dos Santos, Ben Schneider, Vivek Nigam |
| 2019 | Safe and Interactive Autonomy: A Journey Starting from Formal Methods (Keynote). | Dorsa Sadigh |
| 2019 | SuSLik: Synthesis of Safe Pointer-Manipulating Programs (Invited Tutorial). | Nadia Polikarpova |
| 2019 | KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design. | Luca Piccolboni, Giuseppe Di Guglielmo, Luca P. Carloni |
| 2019 | Proving Data Race Freedom in Task Parallel Programs Using a Weaker Partial Order. | Benjamin Ogles, Peter Aldous, Eric Mercer |
| 2019 | Learning-Based Synthesis of Safety Controllers. | Daniel Neider, Oliver Markgraf |
| 2019 | BDD-Based Algorithms for Packet Classification. | Nina Narodytska, Leonid Ryzhyk, Igor Ganichev, Soner Sevinc |
| 2019 | Anytime Weighted MaxSAT with Improved Polarity Selection and Bit-Vector Optimization. | Alexander Nadel |
| 2019 | Verification of Authenticated Firmware Loaders. | Sujit Kumar Muduli, Pramod Subramanyan, Sayak Ray |
| 2019 | Property Directed Inference of Relational Invariants. | Dmitry Mordvinov, Grigory Fedyukovich |
| 2019 | Autarkies for DQCNF. | Oliver Kullmann, Ankit Shukla |
| 2019 | Unification-based Pointer Analysis without Oversharing. | Jakub Kuderski, Jorge A. Navas, Arie Gurfinkel |
| 2019 | Verifying Large Multipliers by Combining SAT and Computer Algebra. | Daniela Kaufmann, Armin Biere, Manuel Kauers |
| 2019 | Kaizen: Building a Performant Blockchain System Verified for Consensus and Integrity. | Faria Kalim, Karl Palmskog, Jayasi Mehar, Adithya Murali, Indranil Gupta, P. Madhusudan |
| 2019 | Integrating SMT with Theorem Proving for Verification of Analog and Mixed-Signal Circuits (Invited Tutorial). | Mark R. Greenstreet |
| 2019 | Syntroids: Synthesizing a Game for FPGAs using Temporal Logic Specifications. | Gideon Geier, Philippe Heim, Felix Klein, Bernd Finkbeiner |
| 2019 | Localizing Quantifiers for DQBF. | Aile Ge-Ernst, Christoph Scholl, Ralf Wimmer |
| 2019 | Input Elimination Transformations for Scalable Verification and Trace Reconstruction. | Raj Kumar Gajavelly, Jason Baumgartner, Alexander Ivrii, Robert L. Kanzelman, Shiladitya Ghosh |
| 2019 | Proving Non-Termination via Loop Acceleration. | Florian Frohn, Jrgen Giesl |
| 2019 | The FMCAD 2019 Student Forum. | Grigory Fedyukovich |
| 2019 | Verification and Synthesis of Symmetric Uni-Rings for Leads-To Properties. | Ali Ebnenasir |
| 2019 | GUIDEDSAMPLER: Coverage-guided Sampling of SMT Solutions. | Rafael Dutra, Jonathan Bachrach, Koushik Sen |
| 2019 | Boosting Verification Scalability via Structural Grouping and Semantic Partitioning of Properties. | Rohit Dureja, Jason Baumgartner, Alexander Ivrii, Robert Kanzelman, Kristin Y. Rozier |