Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency.
Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar
Browse the full DAC paper archive.
Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar
Browse the full DAC paper archive.