Buffer-integrated-Cache: a cost-effective SRAM architecture for handheld and embedded platforms.
Carlos Flores Fajardo, Zhen Fang, Ravi R. Iyer, German Fabila Garcia, Seung Eun Lee, Li Zhao
Browse the full DAC paper archive.
Carlos Flores Fajardo, Zhen Fang, Ravi R. Iyer, German Fabila Garcia, Seung Eun Lee, Li Zhao
Browse the full DAC paper archive.