Ravi R. Iyer
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
41
Venues
21
Active years
1999–2025
Best venue rank
A*
Where they publish
- A*HPCA5 papers
- CICCD4 papers
- BISPASS4 papers
- A*MICRO3 papers
- AICS3 papers
- NationalHiPC3 papers
- A*ISCA2 papers
- BASPDAC2 papers
- BVEE2 papers
- BMASCOTS2 papers
- A*ASPLOS1 paper
- CACML1 paper
- BGLOBECOM1 paper
- ADATE1 paper
- NationalFCCM1 paper
- BNetSoft1 paper
- AISLPED1 paper
- A*DAC1 paper
- A*SIGMETRICS1 paper
- CISPA1 paper
- BICPP1 paper
Papers
41 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ASPLOS | PIM Is All You Need: A CXL-Enabled GPU-Free System for Large Language Model Inference. | Yufeng Gu, Alireza Khadem, Sumanth Umesh, Ning Liang, Xavier Servot, Onur Mutlu, Ravi R. Iyer, Reetuparna Das |
| 2023 | ACML | Mem-Rec: Memory Efficient Recommendation System using Alternative Representation. | Gopi Krishna Jha, Anthony Thomas, Nilesh Jain, Sameh Gobriel, Tajana Rosing, Ravi R. Iyer |
| 2022 | GLOBECOM | DPM-NFV: Dynamic Power Management Framework for 5G User Plane Function using Bayesian Optimization. | Jaroslaw Sydir, Bin Li, Pietro Mercati, Charlie Tai, Ravi R. Iyer, Michael Kishinevsky, Boris Serafimov |
| 2021 | DATE | A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding. | Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Dileep Kurian, Indranil Chakraborty, Sirisha Rani Kale, Nilesh Jain, Tanay Karnik, Ravi R. Iyer, Anuradha Srinivasan |
| 2021 | FCCM | Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs. | Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das |
| 2020 | NetSoft | RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization. | Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic |
| 2019 | HPCA | Bit Prudent In-Cache Acceleration of Deep Convolutional Neural Networks. | Xiaowei Wang, Jiecao Yu, Charles Augustine, Ravi R. Iyer, Reetuparna Das |
| 2018 | ISCA | Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. | Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das |
| 2017 | MICRO | Race-to-sleep + content caching + display caching: a recipe for energy-efficient video streaming on handhelds. | Haibo Zhang, Prasanna Venkatesh Rengasamy, Shulin Zhao, Nachiappan Chidambaram Nachiappan, Anand Sivasubramaniam, Mahmut T. Kandemir, Ravi R. Iyer, Chita R. Das |
| 2016 | HPCA | Cache QoS: From concept to reality in the Intel Xeon processor E5-2600 v3 product family. | Andrew Herdrich, Edwin Verplanke, Priya Autee, Ramesh Illikkal, Chris Gianos, Ronak Singhal, Ravi R. Iyer |
| 2014 | ICCD | QoS management on heterogeneous architecture for parallel applications. | Ying Zhang, Li Zhao, Ramesh Illikkal, Ravi R. Iyer, Andrew Herdrich, Lu Peng |
| 2012 | ASPDAC | Accelerator-rich architectures: Implications, opportunities and challenges. | Ravi R. Iyer |
| 2012 | HPCA | QuickIA: Exploring heterogeneous architectures on real prototypes. | Nagabhushan Chitlur, Ganapati Srinivasa, Scott Hahn, P. K. Gupta, Dheeraj Reddy, David A. Koufaty, Paul Brett, Abirami Prabhakaran, Li Zhao, Nelson Ijih, Suchit Subhaschandra, Sabina Grover, Xiaowei Jiang, Ravi R. Iyer |
| 2012 | ISLPED | Reducing L1 caches power by exploiting software semantics. | Zhen Fang, Li Zhao, Xiaowei Jiang, Shih-Lien Lu, Ravi R. Iyer, Tong Li, Seung Eun Lee |
| 2012 | MICRO | Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access. | Niladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi R. Iyer |
| 2011 | ASPDAC | Template-based memory access engine for accelerators in SoCs. | Bin Li, Zhen Fang, Ravi R. Iyer |
| 2011 | DAC | Buffer-integrated-Cache: a cost-effective SRAM architecture for handheld and embedded platforms. | Carlos Flores Fajardo, Zhen Fang, Ravi R. Iyer, German Fabila Garcia, Seung Eun Lee, Li Zhao |
| 2009 | ICCD | Using checksum to reduce power consumption of display systems for low-motion content. | Kyungtae Han, Zhen Fang, Paul Diefenbaugh, Richard Forand, Ravi R. Iyer, Donald Newell |
| 2009 | ICS | Rate-based QoS techniques for cache/memory in CMP platforms. | Andrew Herdrich, Ramesh Illikkal, Ravi R. Iyer, Donald Newell, Vineet Chadha, Jaideep Moses |
| 2009 | ISPASS | CMPSched$im: Evaluating OS/CMP interaction on shared cache management. | Jaideep Moses, Konstantinos Aisopos, Aamer Jaleel, Ravi R. Iyer, Ramesh Illikkal, Donald Newell, Srihari Makineni |
| 2008 | HiPC | Achieving 10Gbps Network Processing: Are We There Yet?. | Priya Govindarajan, Srihari Makineni, Donald Newell, Ravi R. Iyer, Ram Huggahalli, Amit Kumar |
| 2008 | VEE | Characterization & analysis of a server consolidation benchmark. | Padma Apparao, Ravi R. Iyer, Xiaomin Zhang, Donald Newell, Tom Adelmeyer |
| 2007 | HiPC | qTLB: Looking Inside the Look-Aside Buffer. | Omesh Tickoo, Hari Kannan, Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Donald Newell |
| 2007 | HiPC | Constraint-Aware Large-Scale CMP Cache Design. | Li Zhao, Ravi R. Iyer, Srihari Makineni, Ramesh Illikkal, Jaideep Moses, Donald Newell |
| 2007 | ICCD | Exploring DRAM cache architectures for CMP server platforms. | Li Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald Newell |
| 2007 | ISPASS | Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance. | Seongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer, Li Zhao, W. Cohen |
| 2007 | ISPASS | Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation. | Wenlong Li, Eric Q. Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du |
| 2007 | SIGMETRICS | QoS policies and architecture for cache/memory in CMP platforms. | Ravi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt |
| 2007 | VEE | I/O processing in a virtualized platform: a simulation-driven approach. | Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Jaideep Moses, Donald Newell, Renato J. O. Figueiredo |
| 2006 | ISPA | Architectural Characterization of VM Scaling on an SMP Machine. | Padma Apparao, Ravi R. Iyer, Donald Newell |
| 2006 | MICRO | Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions. | Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, Bharadwaj Amrutur, Ravi R. Iyer, Srihari Makineni, Donald Newell |
| 2005 | ICCD | Hardware Support for Bulk Data Movement in Server Platforms. | Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan, Donald Newell |
| 2005 | ISCA | Direct Cache Access for High Bandwidth Network I/O. | Ram Huggahalli, Ravi R. Iyer, Scott Tetrick |
| 2005 | ISPASS | Anatomy and Performance of SSL Processing. | Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. Bhuyan |
| 2004 | HPCA | Architectural Characterization of TCP/IP Packet Processing on the Pentium M Microprocessor. | Srihari Makineni, Ravi R. Iyer |
| 2004 | ICPP | Architectural Characterization of an XML-Centric Commercial Server Workload. | Padma Apparao, Ravi R. Iyer, Ricardo Morin, Naren Nayak, Mahesh Bhat, David Halliwell, William Steinberg |
| 2004 | ICS | CQoS: a framework for enabling QoS in shared caches of CMP platforms. | Ravi R. Iyer |
| 2004 | MASCOTS | ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms. | Jaideep Moses, Ramesh Illikkal, Ravi R. Iyer, Ram Huggahalli, Donald Newell |
| 2003 | MASCOTS | On Modeling and Analyzing Cache Hierarchies using CASPER. | Ravi R. Iyer |
| 1999 | HPCA | Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors. | Ravi R. Iyer, Laxmi N. Bhuyan |
| 1999 | ICS | Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applications. | Ravi R. Iyer, Nancy M. Amato, Lawrence Rauchwerger, Laxmi N. Bhuyan |