Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.
Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
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Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
Browse the full DATE paper archive.