Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
DATE
/
Paper
UNIT: A Highly Unified and Memory-Efficient FPGA-Based Accelerator for Torus FHE.
Yuying Zhang
,
Sharad Sinha
,
Jiang Xu
,
Wei Zhang
Venue
A
DATE
Year
2025
Proceedings
DATE
DBLP record
conf/date/ZhangSXZ25 ↗
Browse the full
DATE paper archive
.