A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection.
Viktor Herrmann, Justin Knapheide, Fritjof Steinert, Benno Stabernack
Browse the full DSD paper archive.
Viktor Herrmann, Justin Knapheide, Fritjof Steinert, Benno Stabernack
Browse the full DSD paper archive.