| 2025 | PCS | UNNIP: Memory Optimized Universal Neural Network Intra-Prediction for Custom On-Chip Hardware-Architectures. | Viktor Herrmann, Justin Knapheide, Benno Stabernack |
| 2023 | FPL | Demonstrating NADA: A Workflow for Distributed CNN Training on FPGA Clusters. | Justin Knapheide, Philipp Kreowsky, Benno Stabernack |
| 2023 | FPL | Challenges Using FPGA Clusters for Distributed CNN Training. | Philipp Kreowsky, Justin Knapheide, Benno Stabernack |
| 2023 | SC | Enabling Communication with FPGA-based Network-attached Accelerators for HPC Workloads. | Steffen Christgau, Dylan Everingham, Florian Mikolajczak, Niklas Schelten, Bettina Schnor, Max Schrtter, Benno Stabernack, Fritjof Steinert |
| 2022 | DSD | A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection. | Viktor Herrmann, Justin Knapheide, Fritjof Steinert, Benno Stabernack |
| 2021 | FPL | Demonstration of a Distributed Accelerator Framework for Energy-efficient ML Processing. | Fritjof Steinert, Justin Knapheide, Benno Stabernack |
| 2020 | DSD | Hardware and Software Components towards the Integration of Network-Attached Accelerators into Data Centers. | Fritjof Steinert, Niklas Schelten, Anton Schulte, Benno Stabernack |
| 2020 | FPL | A High Throughput MobileNetV2 FPGA Implementation Based on a Flexible Architecture for Depthwise Separable Convolution. | Justin Knapheide, Benno Stabernack, Maximilian Kuhnke |