PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks.
Seyedramin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong
Browse the full FCCM paper archive.
Seyedramin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong
Browse the full FCCM paper archive.