| 2026 | ASPDAC | UltraMalloc: Efficient FPGA-based Memory Allocation Framework Optimized for HBM. | Yuwei Qu, Yiqing Mao, Yanxing Jin, Wai-Shing Luk, Lingli Wang |
| 2026 | ASPDAC | Novel Multi-Corner Delay Padding using Path Relationship Analysis and Dual Decomposition. | Kaixiang Zhu, Jiangnan Li, Lingli Wang, Wai-Shing Luk |
| 2026 | DATE | Compacted-LUT: Fine-Grained Customizable LUT Architecture via SRAM-MUX Co-Optimization. | Mingyang Chen, Yunfei Dai, Wai-Shing Luk, Qing He, Yu He, Lingli Wang |
| 2026 | DATE | A Collaborative Framework for Multi-Level Multi-Objective Design Space Exploration. | Jiangnan Li, Kaixiang Zhu, Yuping Bai, Yunfei Dai, Qing He, Yu He, Lingli Wang |
| 2026 | ISCA | Lora: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions. | Yuan Dai, Guibin Zou, Yuanda Yang, Huan Lin, Jiahang Lou, Yiwen Luo, Xinyu Cai, Wenbo Yin, Wai-Shing Luk, Lingli Wang |
| 2026 | ISCAS | An End-to-End Compilation Flow with Reinforcement Learning-Guided Logic Synthesis. | Jiangnan Li, Kaixiang Zhu, Qing He, Yu He, Lingli Wang |
| 2026 | ISCAS | Live Demonstration: An Agile FPGA-Overlayed CGRA SoC for High-Efficiency Computing. | Jiahang Lou, Jianrong Zhang, Yuan Dai, Zewei Zhong, Huan Lin, Wenbo Yin, Lingli Wang |
| 2026 | ISCAS | RL-FRA: Exploration and Optimization of FPGA Routing Architectures via Model-Based Reinforcement Learning. | Yuanqi Wang, Xianfeng Cao, Lingli Wang |
| 2026 | ISCAS | MOE: An Efficient Multicasting and One-hot Encoding Hybrid Configuration Compression Technique for CGRAs. | Hanyu Zhang, Yuan Dai, Wenbo Yin, Lingli Wang |
| 2025 | ASPDAC | Towards Efficient Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring. | Yuan Dai, Xuchen Gao, Chen Shen, Bingbing Peng, Wenbo Yin, Wai-Shing Luk, Lingli Wang |
| 2025 | ASPDAC | Yield-driven Clock Skew Scheduling Based on Generalized Extreme Value Distribution. | Kaixiang Zhu, Wai-Shing Luk, Lingli Wang |
| 2025 | DAC | LEMOE: LLM-Enhanced Multi-Objective Bayesian Optimization for Microarchitecture Exploration. | Jingyuan Li, Jianrong Zhang, Ye Li, Wenbo Yin, Lingli Wang |
| 2025 | DAC | Adora Compiler: End-to-End Optimization for High-Efficiency Dataflow Acceleration and Task Pipelining on CGRAs. | Jiahang Lou, Qilong Zhu, Yuan Dai, Zewei Zhong, Wenbo Yin, Lingli Wang |
| 2025 | FPGA | Two-Phase Transistor Sizing for FPGAs via Bayesian Optimization. | Xianfeng Cao, Huizhen Kuang, Yuanqi Wang, Lingli Wang |
| 2025 | FPL | FLAIC: A Novel FPGA Logic Architecture via Fine-Grained Cut Topology Analysis. | Xianfeng Cao, Huizhen Kuang, Yuanqi Wang, Lingli Wang |
| 2025 | FPL | GEF: A GNN-Based Evaluation Framework for FPGA Routing Architecture. | Yuanqi Wang, Yunfei Dai, Jiangnan Li, Kaixiang Zhu, Huizhen Kuang, Hao Zhou, Eric Ren, Xifan Tang, Weijun Qin, Tao Li, Lingli Wang |
| 2025 | FPL | DEFA: Design Space Exploration for FPGA Overlay Accelerators Through Frequency Prediction and Bayesian Optimization. | Qilong Zhu, Yunfei Dai, Shiyan Bi, Huizhen Kuang, Dylan Wang, Wenbo Yin, Lingli Wang |
| 2025 | ICCAD | DynVec: An End-to-End Framework for Efficient Vector-Dataflow Execution. | Jiangnan Li, Xianfeng Cao, Kaixiang Zhu, Wenbo Yin, Lingli Wang |
| 2024 | ASPDAC | A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. | Xuchen Gao, Yunhui Qiu, Yuan Dai, Wenbo Yin, Lingli Wang |
| 2024 | DATE | An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. | Jiahang Lou, Xuchen Gao, Yiqing Mao, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang |
| 2024 | FPL | CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design. | Yiqing Mao, Xuchen Gao, Jiahang Lou, Yunhui Qiu, Wenbo Yin, Wai-Shing Luk, Lingli Wang |
| 2023 | CVPR | Multi-view Inverse Rendering for Large-scale Real-world Indoor Scenes. | Zhen Li, Lingli Wang, Mofang Cheng, Cihui Pan, Jiaqi Yang |
| 2023 | FCCM | UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. | Yuan Dai, Yunhui Qiu, Qilong Zhu, Jingyuan Li, Wenbo Yin, Lingli Wang |
| 2023 | FCCM | PRAD: A Bayesian Optimization-based DSE Framework for Parameterized Reconfigurable Architecture Design. | Bingbing Peng, Shaoyang Sun, Yuan Dai, Jingyuan Li, Yunhui Qiu, Kaihang Wang, Wenbo Yin, Lingli Wang |
| 2023 | ICIS | Dynamics and Impacts of Human-Algorithm Consensus in Logistics Scheduling: Evidence from A Field Experiment. | Lingli Wang, Ding Wu, Nina Huang, Hongshuyu Deng, Xiaotian Zhuang |
| 2023 | ISCAS | THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE. | Jingyuan Li, Yunhui Qiu, Guowei Zhu, Qilong Zhu, Wenbo Yin, Lingli Wang |
| 2022 | CVPR | PhyIR: Physics-based Inverse Rendering for Panoramic Indoor Images. | Zhen Li, Lingli Wang, Xiang Huang, Cihui Pan, Jiaqi Yang |
| 2022 | FPL | TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. | Yunhui Qiu, Yuhang Cao, Yuan Dai, Wenbo Yin, Lingli Wang |
| 2022 | FPL | GRAEBO: FPGA General Routing Architecture Exploration via Bayesian Optimization. | Su Zheng, Jiadong Qian, Hao Zhou, Lingli Wang |
| 2022 | ISCAS | Low Error-Rate Approximate Multiplier Design for DNNs with Hardware-Driven Co-Optimization. | Yao Lu, Jide Zhang, Su Zheng, Zhen Li, Lingli Wang |
| 2022 | ISCAS | HEAM: High-Efficiency Approximate Multiplier optimization for Deep Neural Networks. | Su Zheng, Zhen Li, Yao Lu, Jingbo Gao, Jide Zhang, Lingli Wang |
| 2021 | FPL | A High-performance Open-channel Open-way NAND Flash Controller Architecture. | Yunhui Qiu, Wenbo Yin, Lingli Wang |
| 2021 | FPL | Two-level MUX Design and Exploration in FPGA Routing Architecture. | Yuhang Shen, Jiadong Qian, Kaichuang Shi, Lingli Wang, Hao Zhou |
| 2021 | ICIS | The Sales Data Sells: Effects of Real-Time Sales Analytics on Live Streaming Selling. | Yumei He, Lingli Wang, Nina Huang, Yili Hong, Jiandong Ding, Yan Sun, Yingyao Liu |
| 2021 | ICIS | Effectiveness of AI Assistance in Live Streaming: A Randomized Field Experiment. | Lingli Wang, Yumei He, Jiandong Ding, Nina Huang, Yili Hong, Xunhua Guo, De Liu, Guoqing Chen |
| 2021 | IJCNN | Heuristic Search for Activation Functions of Neural Networks Based on Gaussian Processes. | Xinxing Shi, Jialin Chen, Lingli Wang |
| 2020 | FPGA | LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations. | Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong |
| 2020 | ICIS | Effects of Voice-Based AI in Customer Service: Evidence from a Natural Experiment. | Lingli Wang, Nina Huang, Yili Hong, Luning Liu, Xunhua Guo, Guoqing Chen |
| 2019 | FCCM | PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks. | Seyedramin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong |
| 2019 | FPL | A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. | Yuchen Ren, Zhijian Liao, Xiaozhong Shi, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He |
| 2019 | FPL | Bent Routing Pattern for FPGA. | Xibo Sun, Hao Zhou, Lingli Wang |
| 2019 | IJCNN | Targeted Black-Box Adversarial Attack Method for Image Classification Models. | Su Zheng, Jialin Chen, Lingli Wang |
| 2018 | FPL | RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks. | Cheng Luo, Yuhua Wang, Wei Cao, Philip H. W. Leong, Lingli Wang |
| 2018 | FPL | A Novel Low-Communication Energy-Efficient Reconfigurable CNN Acceleration Architecture. | Di Wu, Jin Chen, Wei Cao, Lingli Wang |
| 2018 | FPL | Fast Adjustable NPN Classification using Generalized Symmetries. | Xuegong Zhou, Lingli Wang, Peiyi Zhao, Alan Mishchenko |
| 2018 | ICIS | The "On-the-Hour Effect": How Do Users Allocate Time to Different Modules in e-Learning Apps? | Lingli Wang, Xunhua Guo, Guoqing Chen |
| 2018 | ISCAS | Ultra-Low Latency and High Throughput Key-Value Store Systems Over Ethernet. | Li Ding, Wenbo Yin, Lingli Wang |
| 2017 | FPL | Accelerating low bit-width convolutional neural networks with embedded FPGA. | Li Jiao, Cheng Luo, Wei Cao, Xuegong Zhou, Lingli Wang |
| 2017 | FPL | FPGA acceleration of the scoring process of X!TANDEM for protein identification. | Jin Qiu, Ping Kang, Li Ding, Yipeng Yuan, Wenbo Yin, Lingli Wang |
| 2016 | FPL | DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications. | Xitian Fan, Huimin Li, Wei Cao, Lingli Wang |
| 2016 | FPL | Memory efficient and high performance key-value store on FPGA using Cuckoo hashing. | Wei Liang, Wenbo Yin, Ping Kang, Lingli Wang |
| 2016 | FPL | A high performance FPGA-based accelerator for large-scale convolutional neural networks. | Huimin Li, Xitian Fan, Li Jiao, Wei Cao, Xuegong Zhou, Lingli Wang |
| 2016 | FPL | Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules. | Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk |
| 2015 | FPL | UniStream: A unified stream architecture combining configuration and data processing. | Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip H. W. Leong, Lingli Wang |
| 2012 | ICCAD | Lazy man's logic synthesis. | Wenlong Yang, Lingli Wang, Alan Mishchenko |
| 2012 | IGARSS | Evaluation of similarity measure methods for hyperspectral remote sensing data. | Junzhe Zhang, Wenquan Zhu, Lingli Wang, Nan Jiang |
| 2012 | IGARSS | Evaluation of phenology extracting methods from vegetation index time series. | Wenquan Zhu, Minjie Mou, Lingli Wang, Nan Jiang |
| 2012 | IGARSS | A phenology-preserving filtering method to reduce noise in NDVI time series. | Nan Jiang, Wenquan Zhu, Minjie Mou, Lingli Wang, Junzhe Zhang |
| 2010 | FPGA | Building a faster boolean matcher using bloom filter. | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong |
| 2010 | ICCAD | Engineering a scalable Boolean matching based on EDA SaaS 2.0. | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong |
| 2005 | IGARSS | Study of african dust storm and its effects on tropical cyclones over Atlantic Ocean from space. | John J. Qu, Xianjun Hao, Wanting Wang, Lingli Wang, Menas Kafatos, Liguang Wu |
| 2005 | IGARSS | Development and enhancement of calibration/validation toolkit for supporting NPOESS/NPP missions. | Xianjun Hao, John J. Qu, Sanjeeb Bhoi, Swarvanu Dasgupta, Wanting Wang, Yong Xie, Lingli Wang, Bruce Hauss, Chunming Wang |
| 2001 | VLSID | Multilevel Logic Minimization Using Functional Don't Cares. | Lingli Wang, A. E. A. Almaini |