Skip to content

Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA.

Eduardo Picatoste-Olloqui, Francisco Cardells-Tormo, Jordi Sempere-Agull, Atil Herms-Berenguer

VenueBFPL
Year2004
ProceedingsFPL

Browse the full FPL paper archive.