Loop scheduling and assignment to minimize energy while hiding latency for heterogeneous multi-bank memory.
Meikang Qiu, Jiande Wu, Chun Jason Xue, Jingtong Hu, Wei-Che Tseng, Edwin Hsing-Mean Sha
Browse the full FPL paper archive.
Meikang Qiu, Jiande Wu, Chun Jason Xue, Jingtong Hu, Wei-Che Tseng, Edwin Hsing-Mean Sha
Browse the full FPL paper archive.