RISC-V Based SoC Design Featuring Fixed and Floating Point Units with Integrated FFT Accelerator for DSP Workloads.
Umer Kudachi, Saroja V. Siddamal, Shreevatsa Alawandi, Aishwarya Beedanal
Browse the full HiPC paper archive.
Umer Kudachi, Saroja V. Siddamal, Shreevatsa Alawandi, Aishwarya Beedanal
Browse the full HiPC paper archive.