A high speed CMOS/SOS implementation of a bit level systolic correlator.
J. C. White, John V. McCanny, A. McCabe, John G. McWhirter, R. Evans
Browse the full ICASSP paper archive.
J. C. White, John V. McCanny, A. McCabe, John G. McWhirter, R. Evans
Browse the full ICASSP paper archive.