| 2011 | FPL | Generic Low-Latency NoC Router Architecture for FPGA Computing Systems. | Ye Lu, John V. McCanny, Sakir Sezer |
| 2010 | FPL | Advanced Multithreading Architecture with Hardware Based Scheduling. | Ye Lu, Sakir Sezer, John V. McCanny |
| 2010 | ISCAS | TLM2.0 based timing accurate modeling method for complex NoC systems. | Ye Lu, Sakir Sezer, John V. McCanny |
| 2008 | ICASSP | Modified givens rotations and their application to matrix inversion. | Lei Ma, Kevin Dickson, John McAllister, John V. McCanny |
| 2008 | ISCAS | Differential Power Analysis of a SHACAL-2 hardware implementation. | Yingxi Lu, Mire O'Neill, John V. McCanny |
| 2004 | FCCM | FPGA Montgomery Multiplier Architectures - A Comparison. | Ciaran McIvor, Mire McLoone, John V. McCanny |
| 2004 | ISCAS | FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p). | Ciaran McIvor, Mire McLoone, John V. McCanny |
| 2003 | FPL | Very High Speed 17 Gbps SHACAL Encryption Architecture. | Mire McLoone, John V. McCanny |
| 2003 | ICASSP | Implementation of adaptive beamforming based on QR decomposition for CDMA. | Zhaohui Liu, John V. McCanny |
| 2003 | ISCAS | A high-speed, low latency RSA decryption silicon core. | Ciaran McIvor, Mire McLoone, John V. McCanny |
| 2002 | ICASSP | Design and implementation of the symmetrically extended 2-D Wavelet Transform. | Paul V. McCanny, Shahid Masud, John V. McCanny |
| 2002 | ICASSP | A hybrid mixed cost-function TEQ initialization algorithm for ADSL modems. | Kok Sing Yap, John V. McCanny |
| 2001 | CHES | High Performance Single-Chip FPGA Rijndael Algorithm Implementations. | Mire McLoone, John V. McCanny |
| 2001 | FPL | Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm. | Mire McLoone, John V. McCanny |
| 2001 | ICASSP | Generic scheduling methods for a linear QR array SoC processor. | Zhaohui Liu, Gaye Lightbody, Richard L. Walke, Yi Hu, John V. McCanny |
| 2001 | ICIP | An efficient architecture for the 2-D biorthogonal discrete wavelet transform. | Paul V. McCanny, Shahid Masud, John V. McCanny |
| 2000 | ICASSP | Wavelet packet transforms for system-on-chip applications. | Shahid Masud, John V. McCanny |
| 1999 | ICASSP | Novel mapping of a linear QR architecture. | Gaye Lightbody, Richard L. Walke, Roger F. Woods, John V. McCanny |
| 1999 | ICASSP | Rapid design of discrete orthonormal wavelet transforms using silicon IP components. | Shahid Masud, John V. McCanny |
| 1998 | ICASSP | Discrete cosine transform generator for VLSI synthesis. | Jill K. Hunter, John V. McCanny |
| 1998 | RSP | Rapid Design of Discrete Orthonormal Wavelet Transforms. | Shahid Masud, John V. McCanny |
| 1997 | ICASSP | Hierarchical VHDL libraries for DSP ASIC design. | John V. McCanny, Douglas Ridge, Yi Hu, Jill K. Hunter |
| 1993 | ARITH | New algorithms and VLSI architectures for SRT division and square root. | Stephen E. McQuillan, John V. McCanny, Robert Hamill |
| 1992 | ICASSP | The systematic design of high performance digital filters. | B. P. McGovern, Roger F. Woods, John V. McCanny |
| 1991 | CCC | On the use of most significant digit first arithmetic in the design of high performance DSP chips. | John V. McCanny |
| 1991 | ICASSP | Design and test of a bit parallel 2nd order IIR filter structure. | O. C. McNally, William P. Marnane, John V. McCanny |
| 1991 | ICASSP | A VLSI architecture for multiplication, division and square root. | Stephen E. McQuillan, John V. McCanny |
| 1990 | ICASSP | Pipelined two-port adaptor for wave digital filtering. | Rajinder Jit Singh, John V. McCanny, Roger F. Woods |
| 1990 | ICASSP | VLSI architectures for digital image coding. | M. Yan, John V. McCanny, Yi Hu |
| 1990 | ICCD | Optimized bit level architectures for IIR filtering. | O. C. McNally, John V. McCanny, Roger F. Woods |
| 1989 | ICASSP | A bit-level systolic architecture for very high performance IIR filters. | Simon C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny |
| 1988 | ICASSP | An independent evaluation of the performance of the CCITT G.722 wideband coding recommendation using music signals. | S. M. F. Smyth, John V. McCanny, P. Challener |
| 1988 | ICASSP | An independent evaluation of the performance of the CCITT G.722 wideband coding recommendation. | S. M. F. Smyth, John V. McCanny, P. Challener |
| 1988 | ICASSP | Systolic IIR filters with bit level pipelining. | Roger F. Woods, Simon C. Knowles, John V. McCanny, John G. McWhirter |
| 1987 | Interspeech | Transformed sub-band coding of speech using vector quantization. | H. A. Kaouri, John V. McCanny |
| 1986 | ICASSP | Mapping system level functions on to bit level systolic arrays. | John V. McCanny |
| 1986 | ICASSP | A high speed CMOS/SOS implementation of a bit level systolic correlator. | J. C. White, John V. McCanny, A. McCabe, John G. McWhirter, R. Evans |
| 1985 | ICASSP | A systolic implementation of the Winograd Fourier transform algorithm. | J. S. Ward, John V. McCanny, John G. McWhirter |