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A very low-power 8-bit Sigma-Delta converter in a 0.8m CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V.
Andrea Gerosa
,
Andrea Neviani
Venue
C
ISCAS
Year
2003
Proceedings
ISCAS (5)
DBLP record
conf/iscas/GerosaN03 ↗
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