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Andrea Gerosa

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

24

Venues

5

Active years

2000–2024

Best venue rank

C

Where they publish

Papers

24 indexed papers, newest first.

YearVenueTitleAuthors
2024EDUCONWork in Progress: Systems Thinking as a Foundation for Sustainability Awareness and Ethical Use of Technologies.Andrea Gerosa
2019ISCASA Multi-Phase Self-Reconfigurable Switched-Capacitor DC-DC Step-Up Converter Integrated in CMOS Technology.Andrea Gerosa, Andrea Bevilacqua, Giorgio Spiazzi
2016ISCASA reduced hardware complexity data-weighted averaging algorithm with no tonal behavior.Alberto Celin, Andrea Gerosa
2015ISCASOptimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs.Alberto Celin, Andrea Gerosa
2011ISCASIntegrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints.Matteo Bassi, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2010ISCASA digitally programmable ring oscillator in the UWB range.Andrea Gerosa, Silvia Sold, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
2010ISCASLow-power UWB transmitter using a combined mixer and power amplifier.Silvia Sold, Michele Caruso, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2010ISCASA thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks.Stefano Dal Toso, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2008ISCASDesign of broadband inductorless LNAs in ultra-scaled CMOS technologies.Andrea Bevilacqua, Matteo Camponeschi, Marc Tiebout, Andrea Gerosa, Andrea Neviani
2008ISCASAn energy-detector for non-coherent impulse-radio UWB receivers.Andrea Gerosa, Maurizio Dalla Costa, Andrea Bevilacqua, Daniele Vogrig, Andrea Neviani
2008ISCASAnalog decoding of trellis coded modulation for multi-level flash memories.Silvia Sold, Daniele Vogrig, Andrea Bevilacqua, Andrea Gerosa, Andrea Neviani
2007ISCASQuadrature VCOs Based on Coupled PLLs.Andrea Bevilacqua, Christoph Sandner, Andrea Gerosa, Andrea Neviani
2007ISCASA 0.18-m CMOS Squarer Circuit for a Non-Coherent UWB Receiver.Andrea Gerosa, M. Soldan, Alessandro Bevilacqua, Andrea Neviani
2006GLOBECOMReconfigurable Analog Decoder for a Serially Concatenated Convolutional Code.Alexandre Graell i Amat, Daniele Vogrig, Sergio Benedetto, Guido Montorsi, Andrea Neviani, Andrea Gerosa
2006ISCASAn optimal architecture for a multimode ADC, based on the cascade of a Sigma Delta modulator and a flash converter.Andrea Gerosa, Andrea Bevilacqua, Andrea Neviani, Andrea Xotta
2005ISCASA multi-mode Sigma-Delta analog-to-digital converter for GSM, UMTS and WLAN.Andrea Xotta, Andrea Gerosa, Andrea Neviani
2004ISCASA low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter.Andrea Gerosa, Andrea Neviani
2004ISITAn analog turbo decoder for the UMTS standard.Alexandre Graell i Amat, Guido Montorsi, Sergio Benedetto, Daniele Vogrig, Andrea Neviani, Andrea Gerosa
2003ISCASA very low-power 8-bit Sigma-Delta converter in a 0.8m CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V.Andrea Gerosa, Andrea Neviani
2003ISCASPerformance optimization in micro-power, low-voltage log-domain filters in pure CMOS technology.Andrea Maniero, Andrea Gerosa, Andrea Neviani
2003ISCASAnalog CMOS implementation of Gallager's iterative decoding algorithm applied to a block turbo code.Matteo Perenzoni, Andrea Gerosa, Andrea Neviani
2002ISCASAn all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels.Andrea Xotta, Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Melchiorre Bruccoleri, Giorgio Betti
2001ISCASA micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker.Andrea Gerosa, Arianna Novo, Andrea Mengalli, Andrea Neviani
2000ISLPEDLow-power sensing and digitization of cardiac signals based on sigma-delta conversion (poster session).Andrea Gerosa, Arianna Novo, Andrea Neviani