A model-first design and verification flow for analog-digital convergence systems: A high-speed receiver example in digital TVs.
Jaeha Kim, Sigang Ryu, Byoung-Joo Yoo, Hanseok Kim, Yunju Choi, Deog-Kyoon Jeong
Browse the full ISCAS paper archive.
Jaeha Kim, Sigang Ryu, Byoung-Joo Yoo, Hanseok Kim, Yunju Choi, Deog-Kyoon Jeong
Browse the full ISCAS paper archive.