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Paper
A VLSI-efficient signed magnitude comparator for { 2n-1, 2n, 2n +2n+1-1} RNS.
Sachin Kumar
,
Chip-Hong Chang
Venue
C
ISCAS
Year
2016
Proceedings
ISCAS
DBLP record
conf/iscas/KumarC16 ↗
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