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Chip-Hong Chang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

110

Venues

10

Active years

1994–2025

Best venue rank

A*

Where they publish

Papers

110 indexed papers, newest first.

YearVenueTitleAuthors
2025ICMLUnlocking the Capabilities of Large Vision-Language Models for Generalizable and Explainable Deepfake Detection.Peipeng Yu, Jianwei Fei, Hui Gao, Xuan Feng, Zhihua Xia, Chip-Hong Chang
2025ISCASPUF-based Edge DNN Model IP Protection with Self-obfuscation and Publicly Verifiable Ownership.Jingdong Jiang, Yue Zheng, Chip-Hong Chang
2025ISCASAccuracy-preserving Layer Normalization Approximations for Efficient Transformer Hardware Accelerators.Nazim Altar Koca, Anh Tuan Do, Chip-Hong Chang
2024CCSASHES '24: Workshop on Attacks and Solutions in Hardware Security.Lejla Batina, Chip-Hong Chang, Ulrich Rhrmair, Jakub Szefer
2024CVPRSteganographic Passport: An Owner and User Verifiable Credential for Deep Model IP Protection Without Retraining.Qi Cui, Ruohan Meng, Chaohui Xu, Chip-Hong Chang
2024DATEEfficient Fast Additive Homomorphic Encryption Cryptoprocessor for Privacy-Preserving Federated Learning Aggregation.Wenye Liu, Nazim Altar Koca, Chip-Hong Chang
2024ISCASLive Demonstration: Man-in-the-Middle Attack on Edge Artificial Intelligence.Bowen Hu, Weiyang He, Si Wang, Wenye Liu, Chip-Hong Chang
2024ISCASExploring Error Correction Circuits on RISC-V based Systems for Space Applications.Nazim Altar Koca, Chip-Hong Chang, Anh Tuan Do, Vishnu P. Nambiar
2023ACLZero-Shot Text Classification via Self-Supervised Tuning.Chaoqun Liu, Wenxuan Zhang, Guizhen Chen, Xiaobao Wu, Anh Tuan Luu, Chip-Hong Chang, Lidong Bing
2023CCSASHES '23: Workshop on Attacks and Solutions in Hardware Security.Lejla Batina, Chip-Hong Chang, Domenic Forte, Ulrich Rhrmair
2023DATEEnergy-efficient NTT Design with One-bank SRAM and 2-D PE Array.Jianan Mu, Huajie Tan, Jiawen Wu, Haotian Lu, Chip-Hong Chang, Shuai Chen, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li
2023ISCASHardware-efficient Softmax Approximation for Self-Attention Networks.Nazim Altar Koca, Anh Tuan Do, Chip-Hong Chang
2023ISCASA Lightweight PUF-based Secure Group Key Agreement Protocol for Wireless Sensor Networks.Yue Zheng, Wenye Liu, Chip-Hong Chang
2022CCSASHES 2022 - 6th Workshop on Attacks and Solutions in Hardware Security.Chip-Hong Chang, Domenic Forte, Debdeep Mukhopadhyay, Ulrich Rhrmair
2021CCSA Forward Error Compensation Approach for Fault Resilient Deep Neural Network Accelerator Design.Wenye Liu, Chip-Hong Chang
2021ISCASLive Demonstration: Event-Driven Physical Unclonable Function for Proactive Monitoring System by Dynamic Vision Sensor.Jian Xian Soo, Yue Zheng, Chip-Hong Chang
2021ISCASFingerprinting Deep Neural Networks - a DeepFool Approach.Si Wang, Chip-Hong Chang
2021ISCASSecure Mutual Authentication and Key-Exchange Protocol between PUF-Embedded IoT Endpoints.Yue Zheng, Chip-Hong Chang
2020CCSASHES 2020: 4th Workshop on Attacks and Solutions in Hardware Security.Chip-Hong Chang, Stefan Katzenbeisser, Ulrich Rhrmair, Patrick Schaumont
2020DACImperceptible Misclassification Attack on Deep Learning Accelerator by Glitch Injection.Wenye Liu, Chip-Hong Chang, Fan Zhang, Xiaoxuan Lou
2020ISCASReducing Temperature Induced Unreliability in Sub-Threshold Strong PUFs through Circuit Modeling.Nimesh Shah, Sumon Kumar Bose, Chip-Hong Chang, Arindam Basu
2020ISCASFired Neuron Rate Based Decision Tree for Detection of Adversarial Examples in DNNs.Si Wang, Wenye Liu, Chip-Hong Chang
2019CCSASHES 2019: 3rd Workshop on Attacks and Solutions in Hardware Security.Chip-Hong Chang, Daniel E. Holcomb, Francesco Regazzoni, Ulrich Rhrmair, Patrick Schaumont
2019CCSA Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs.Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Neil Hanley, Jack Miskelly, Mire O'Neill
2019ISCASAnalysis of Circuit Aging on Accuracy Degradation of Deep Neural Network Accelerator.Wenye Liu, Chip-Hong Chang
2019ISCASHigh-Speed True Random Number Generator Based on Differential Current Starved Ring Oscillators with Improved Thermal Stability.Kai Wang, Yuan Cao, Chip-Hong Chang, Xiaoli Ji
2019ISCASAn In-Pixel Gain Amplifier Based Event-Driven Physical Unclonable Function for CMOS Dynamic Vision Sensors.Biyin Wang, Xiaojin Zhao, Yue Zheng, Chip-Hong Chang
2019ISCASA Reliable Physical Unclonable Function Based on Differential Charging Capacitors.Hang Yuan, Wei Guo, Chip-Hong Chang, Yuan Cao, Shaojun Wei, Shouyi Yin, Chenchen Deng, Leibo Liu, Wei Ge, Fan Zhang
2018CCSASHES 2018- Workshop on Attacks and Solutions in Hardware Security.Chip-Hong Chang, Jorge Guajardo, Daniel E. Holcomb, Francesco Regazzoni, Ulrich Rhrmair
2018ICCCNA Fully Digital Physical Unclonable Function Based Temperature Sensor for Secure Remote Sensing.Yuan Cao, Yunyi Guo, Benyu Liu, Wei Ge, Min Zhu, Chip-Hong Chang
2018ISCASA Sub-pico Joules Per Bit Robust Physical Unclonable Function Based on Subthreshold Voltage References.Yuan Cao, Chip-Hong Chang, Wenhan Zheng, Xiaojin Zhao
2018ISCASActive IC Metering of Digital Signal Processing Subsystem with Two-Tier Activation for Secure Split Test.Sumedh Somnath Dhabu, Yue Zheng, Wenye Liu, Chip-Hong Chang
2018ISCASSecuring IoT Monitoring Device using PUF and Physical Layer Authentication.Yue Zheng, Sumedh Somnath Dhabu, Chip-Hong Chang
2017CCSASHES 2017: Workshop on Attacks and Solutions in Hardware Security.Chip-Hong Chang, Marten van Dijk, Farinaz Koushanfar, Ulrich Rhrmair, Mark Tehranipoor
2017ISCASA new watermarking scheme on scan chain ordering for hard IP protection.Xiaonan Huang, Aijiao Cui, Chip-Hong Chang
2017ISCASA new write-contention based dual-port SRAM PUF with multiple response bits per cell.Chao Qun Liu, Yue Zheng, Chip-Hong Chang
2017ISCAS20 Years of research on intellectual property protection.Miodrag Potkonjak, Gang Qu, Farinaz Koushanfar, Chip-Hong Chang
2017ISCASCurrent mirror array: A novel lightweight strong PUF topology with enhanced reliability.Zheng Wang, Yi Chen, Aakash Patil, Chip-Hong Chang, Arindam Basu
2017ISCASLow-cost fortification of arbiter PUF against modeling attack.Siarhei S. Zalivaka, Alexander A. Ivaniuk, Chip-Hong Chang
2016ASPDACMulti-valued Arbiters for quality enhancement of PUF responses on FPGA implementation.Siarhei S. Zalivaka, Alexander V. Puchkov, Vladimir P. Klybik, Alexander A. Ivaniuk, Chip-Hong Chang
2016ISCASA VLSI-efficient signed magnitude comparator for { 2n-1, 2n, 2n +2n+1-1} RNS.Sachin Kumar, Chip-Hong Chang
2016ISCASA low-voltage, low power STDP synapse implementation using domain-wall magnets for spiking neural networks.Govind Narasimman, Subhrajit Roy, Xuanyao Fong, Kaushik Roy, Chip-Hong Chang, Arindam Basu
2015ISCASA new unified modular adder/subtractor for arbitrary moduli.Thian Fatt Tay, Chip-Hong Chang
2015ISCASPublic key protocol for usage-based licensing of FPGA IP cores.Li Zhang, Chip-Hong Chang
2015ISCASStatistical analysis and design of 6T SRAM cell for physical unclonable function with dual application modes.Le Zhang, Chip-Hong Chang, Zhi-Hui Kong, Chao Qun Liu
2014ISCASArea-efficient and fast sign detection for four-moduli set RNS {2Chip-Hong Chang, Sachin Kumar
2014ISCASDesign of programmable FIR filters using Canonical Double Based Number Representation.Jiajia Chen, Chip-Hong Chang
2014ISCASA new algorithm for single residue digit error correction in Redundant Residue Number System.Thian Fatt Tay, Chip-Hong Chang
2014ISCASHighly reliable memory-based Physical Unclonable Function using Spin-Transfer Torque MRAM.Le Zhang, Xuanyao Fong, Chip-Hong Chang, Zhi-Hui Kong, Kaushik Roy
2013ASPDACThermal simulator of 3D-IC with modeling of anisotropic TSV conductance and microchannel entrance effects.Hanhua Qian, Hao Liang, Chip-Hong Chang, Wei Zhang, Hao Yu
2013ISCASCluster-based distributed active current timer for hardware Trojan detection.Yuan Cao, Chip-Hong Chang, Shoushun Chen
2013ISCASA signed integer programmable power-of-two scaler for {2Jeremy Yung Shern Low, Thian Fatt Tay, Chip-Hong Chang
2013ISCASMicrochannel splitting and scaling for thermal balancing of liquid-cooled 3DIC.Hanhua Qian, Chip-Hong Chang
2013ISCASPCKGen: A Phase Change Memory based cryptographic key generator.Le Zhang, Zhi-Hui Kong, Chip-Hong Chang
2012ISCASPipelined adder graph optimization for high speed multiple constant multiplication.Martin Kumm, Peter Zipf, Mathias Faust, Chip-Hong Chang
2012ISCASA fast and compact circuit for integer square root computation based on Mitchell logarithmic method.Joshua Yung Lih Low, Ching-Chuen Jong, Jeremy Yung Shern Low, Thian Fatt Tay, Chip-Hong Chang
2012ISCASState encoding watermarking for field authentication of sequential circuit intellectual property.Li Zhang, Chip-Hong Chang
2011ISCASA hybrid watermarking scheme for sequential functions.Aijiao Cui, Chip-Hong Chang, Li Zhang
2011ISCASBit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGA.Mathias Faust, Chip-Hong Chang
2011ISCASA new RNS scaler for {2Jeremy Yung Shern Low, Chip-Hong Chang
2011ISCASA simple radix-4 Booth encoded modulo 2Ramya Muralidharan, Chip-Hong Chang
2010ISCASMinimal Logic Depth adder tree optimization for Multiple Constant Multiplication.Mathias Faust, Chip-Hong Chang
2010ISCASA novel counter-based low complexity inner-product architecture for high speed inputs.Manas Ranjan Meher, Ching-Chuen Jong, Chip-Hong Chang, Jeremy Yung Shern Low
2010ISCASFast hard multiple generators for radix-8 Booth encoded modulo 2Ramya Muralidharan, Chip-Hong Chang
2009ISCASTime-multiplexed Data Flow Graph for the Design of Configurable Multiplier Block.Jiajia Chen, Chip-Hong Chang, Ching-Chuen Jong
2009ISCASNew Power Index Model for Switching Power Analysis from Adder Graph of FIR filter.Jiajia Chen, Chip-Hong Chang, Hanhua Qian
2009ISCASAn Improved Publicly Detectable Watermarking Scheme based on Scan Chain Ordering.Aijiao Cui, Chip-Hong Chang
2009ISCASOptimization of Structural Adders in Fixed Coefficient Transposed Direct Form FIR Filters.Mathias Faust, Chip-Hong Chang
2009ISCASA Compact Current Mode Neuron Circuit with Gaussian Taper Learning Capability.Fei Li, Chip-Hong Chang, Liter Siek
2009ISCASFixed and Variable Multi-modulus Squarer Architectures for Triple Moduli base of RNS.Ramya Muralidharan, Chip-Hong Chang
2008ISCASIntellectual property authentication by watermarking scan chain in design-for-testability flow.Aijiao Cui, Chip-Hong Chang
2008ISCASProgrammable LSB-first and MSB-first modular multipliers for ECC in GF(2Ravi Kumar Satzoda, Ramya Muralidharan, Chip-Hong Chang
2007ISCASWatermarking for IP Protection through Template Substitution at Logic Synthesis Level.Aijiao Cui, Chip-Hong Chang
2006ISCASMaximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design.Chip-Hong Chang, Jiajia Chen, A. Prasad Vinod
2006ISCASStego-signature at logic synthesis level for digital design IP protection.Aijiao Cui, Chip-Hong Chang
2006ISCASA low-power, high-speed RB-to-NB converter for fast redundant binary multiplier.Yajuan He, Chip-Hong Chang
2006ISCASA fast kernel for unifying GF(p) and GF(2Ravi Kumar Satzoda, Chip-Hong Chang
2006ISCASA Kalman filter based on wavelet filter-bank and psychoacoustic modeling for speech enhancement.Yu Shao, Chip-Hong Chang
2006ISCASA novel hybrid neuro-wavelet system for robust speech recognition.Yu Shao, Chip-Hong Chang
2006ISCASA generalized perceptual time-frequency subtraction method for speech enhancement.Yu Shao, Chip-Hong Chang
2006ISCASImproved differential coefficients-based low power FIR filters. Part I. Fundamentals.A. Prasad Vinod, Ankita Singla, Chip-Hong Chang
2006ISCASA new integrated approach to the design of low-complexity FIR filters.Fei Xu, Chip-Hong Chang, Ching-Chuen Jong
2005ISCASA new formulation of fast diminished-one multioperand modulo 2Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan
2005ISCASA new design method to modulo 2Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2005ISCASA configurable dual moduli multi-operand modulo adder.Chip-Hong Chang, Shibu Menon, Bin Cao, Thambipillai Srikanthan
2005ISCASA novel multiplexer based truncated array multiplier.Chip-Hong Chang, Ravi Kumar Satzoda, Swaminathan Sekar
2005ISCASAn area efficient 64-bit square root carry-select adder for low power applications.Yajuan He, Chip-Hong Chang, Jiangmin Gu
2005ISCASA novel covalent redundant binary Booth encoder.Yajuan He, Chip-Hong Chang, Jiangmin Gu, Hossam A. H. Fahmy
2005ISCASA versatile speech enhancement system based on perceptual wavelet denoising.Yu Shao, Chip-Hong Chang
2005ISCASWavelet transform to hybrid support vector machine and hidden Markov model for speech recognition.Yu Shao, Chip-Hong Chang
2005ISCASIFei Xu, Chip-Hong Chang, Ching-Chuen Jong
2004ICASSPEfficient algorithms for common subexpression elimination in digital filter design.Fei Xu, Chip-Hong Chang, Ching-Chuen Jong
2004ISCASDesign of residue-to-binary converter for a new 5-moduli superset residue number system.Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2004ISCASFrequency sensitive self-organizing maps and its application in color quantization.Chip-Hong Chang, Pengfei Xu
2004ISCASSelf-organizing topological tree.Pengfei Xu, Chip-Hong Chang
2004ISCASHWP: a new insight into canonical signed digit.Fei Xu, Chip-Hong Chang, Ching-Chuen Jong
2004ISCASA new contention resolution algorithm for the design of minimal logic depth multiplierless filters.Fei Xu, Chip-Hong Chang, Ching-Chuen Jong
2003ICASSPAn adaptive initialization technique for color quantization by self organizing feature map.Chip-Hong Chang, Rui Xiao, Thambipillai Srikanthan
2003ICASSPLow voltage, low power (5: 2) compressor cell for fast arithmetic circuits.Jiangmin Gu, Chip-Hong Chang
2003ISCASNew efficient residue-to-binary converters for 4-moduli set {2Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan
2003ISCASDesign of a high speed reverse converter for a new 4-moduli set residue number system.Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang
2003ISCASUltra low voltage, low power 4-2 compressor for high speed multiplications.Jiangmin Gu, Chip-Hong Chang
2003ISCASFPGA implementation of a frequency adaptive learning SOFM for digital color still imaging.Shibu Menon, Chip-Hong Chang, Rui Xiao
2003ISCASA novel hybrid pass logic with static CMOS output drive full-adder cell.Mingyan Zhang, Jiangmin Gu, Chip-Hong Chang
2002ISCASAn interconnect optimized floorplanning of a scalar product macrocell.Jiangmin Gu, Chip-Hong Chang, Kiat Seng Yeo
1999ISCASReed-Muller weight and literal vectors for NPN classification.Chip-Hong Chang, Bogdan J. Falkowski
1999ISCASOptimization of partially-mixed-polarity Reed-Muller expansions.Bogdan J. Falkowski, Chip-Hong Chang
1995ASPDACFlexible optimization of fixed polarity Reed-Muller expansions for multiple and output completely and incompletely specified boolean functions.Chip-Hong Chang, Bogdan J. Falkowski
1995ISCASGeneration of Multi-Polarity Arithmetic Transform from Reduced Representation of Boolean Functions.Bogdan J. Falkowski, Chip-Hong Chang
1994ISCASEfficient Algorithms for the Calculation of Arithmetic Spectrum from OBDD & Synthesis of OBDD from Arithmetic Spectrum for Incompletely Specified Boolean Functions.Bogdan J. Falkowski, Chip-Hong Chang