A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS.
B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta
Browse the full ISCAS paper archive.
B. Dinesh Kumar, Hitesh Shrimali, Navneet Gupta
Browse the full ISCAS paper archive.