An area- and power-efficient half-rate clock and data recovery circuit.
Yen-Long Lee, Soon-Jyh Chang, Rong-Sing Chu, Yen-Chi Chen, Jih Ren Goh, Chung-Ming Huang
Browse the full ISCAS paper archive.
Yen-Long Lee, Soon-Jyh Chang, Rong-Sing Chu, Yen-Chi Chen, Jih Ren Goh, Chung-Ming Huang
Browse the full ISCAS paper archive.