A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator.
Hsi-En Liu, Shih-Che Hung, Chih-Wen Lu, Tsin-Yuan Chang
Browse the full ISCAS paper archive.
Hsi-En Liu, Shih-Che Hung, Chih-Wen Lu, Tsin-Yuan Chang
Browse the full ISCAS paper archive.