Skip to content

Tsin-Yuan Chang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

4

Active years

1988–2014

Best venue rank

A*

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2014ISCASA low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator.Hsi-En Liu, Shih-Che Hung, Chih-Wen Lu, Tsin-Yuan Chang
2008ISCASA current mode adaptive on-time control scheme for fast transient DC-DC converters.Hung-Chih Lin, Bou-Ching Fung, Tsin-Yuan Chang
2006ISCASA chaos-based pseudo random number generator using timing-based reseeding method.Chung-Yi Li, Jiung-Sheng Chen, Tsin-Yuan Chang
2005ASPDACOn-chip accumulated jitter measurement for phase-locked loops.Chih-Feng Li, Shao-Sheng Yang, Tsin-Yuan Chang
2004ASPDACTiming measurement unit with multi-stage TVC for embedded memories.Kae-Jiun Mo, Shao-Sheng Yang, Tsin-Yuan Chang
2003ISCASA multi-phase charge-sharing technique without external capacitor for low-power TFT-LCD column drivers.Shao-Sheng Yang, Pao-Lin Guo, Tsin-Yuan Chang, Jin-Hua Hong
2001ISCASA low-cost CMOS time interval measurement core.Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
2001ITCA built-in timing parametric measurement unit.Ming-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang
1990DACDesign of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement.Chin-Long Wey, Jyhyeung Ding, Tsin-Yuan Chang
1988DACPLAYGROUND: Minimization of PLAs with Mixed Ground True Outputs.Chin-Long Wey, Tsin-Yuan Chang