Investigation on the Gate Bias Voltage of BigFET in Power-rail ESD Clamp Circuit for Enhanced Transient Noise Immunity.
Guangyi Lu, Yuan Wang, Lizhong Zhang, Yize Wang, Ru Huang, Xing Zhang
Browse the full ISCAS paper archive.
Guangyi Lu, Yuan Wang, Lizhong Zhang, Yize Wang, Ru Huang, Xing Zhang
Browse the full ISCAS paper archive.