Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation.
Nihar R. Mahapatra, Sriram V. Garimella, Alwin Takeen
Browse the full ISCAS paper archive.
Nihar R. Mahapatra, Sriram V. Garimella, Alwin Takeen
Browse the full ISCAS paper archive.