| 2025 | Interspeech | Fine-Tuning ASR for Stuttered Speech: Personalized vs. Generalized Approaches. | Dena F. Mujtaba, Nihar R. Mahapatra |
| 2024 | Interspeech | Inclusive ASR for Disfluent Speech: Cascaded Large-Scale Self-Supervised Learning with Targeted Fine-Tuning and Data Augmentation. | Dena F. Mujtaba, Nihar R. Mahapatra, Megan Arney, J. Scott Yaruss, Caryn Herring, Jia Bin |
| 2024 | NAACL | Lost in Transcription: Identifying and Quantifying the Accuracy Biases of Automatic Speech Recognition Systems Against Disfluent Speech. | Dena F. Mujtaba, Nihar R. Mahapatra, Megan Arney, J. Scott Yaruss, Hope Gerlach-Houck, Caryn Herring, Jia Bin |
| 2021 | GECCO | Multi-objective optimization of item selection in computerized adaptive testing. | Dena F. Mujtaba, Nihar R. Mahapatra |
| 2019 | ISTAS | Ethical Considerations in AI-Based Recruitment. | Dena F. Mujtaba, Nihar R. Mahapatra |
| 2009 | ICMLA | An Instance-Based Learning Approach for Available-Memory Non-minimal Cost-Bounded Search. | Sandeep K. Namilikonda, Nihar R. Mahapatra |
| 2008 | VLSID | Energy-Efficient Soft-Error Protection Using Operand Encoding and Operation Bypass. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2007 | DAC | An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2007 | VLSID | Partitioned Hybrid Encoding to Minimize On-Chip Energy Dissipation ofWide Microprocessor Buses. | Sharath Jayaprakash, Nihar R. Mahapatra |
| 2006 | DATE | Exploiting data-dependent slack using dynamic multi-VDD to minimize energy consumption in datapath circuits. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2006 | DATE | Value-based bit ordering for energy optimization of on-chip global signal buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2006 | ICCD | Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | DSN | Combining Error Masking and Error Detection Plus Recovery to Combat Soft Errors in Static CMOS Circuits. | Srivathsan Krishnamohan, Nihar R. Mahapatra |
| 2005 | HPCA | Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | VLSID | Dynamically Exploiting Frequent Operand Values for Energy Efficiency in Integer Functional Units. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2005 | VLSID | Energy-Efficient Compressed Address Transmission. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2005 | VLSID | An Accurate Energy and Thermal Model for Global Signal Buses. | Krishnan Sundaresan, Nihar R. Mahapatra |
| 2004 | ICCD | A Highly-Efficient Technique for Reducing Soft Errors in Static CMOS Circuits. | Srivathsan Krishnamohan, Nihar R. Mahapatra |
| 2004 | ICCD | Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study. | Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra |
| 2003 | ICCD | A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units. | Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2003 | ICCD | Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis. | Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan |
| 2003 | IPCCC | The potential of compression to improve memory system performance, power consumption, and cost. | Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan, Srinivas Dangeti, Balakrishna V. Venkatrao |
| 2000 | ISCAS | Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation. | Nihar R. Mahapatra, Sriram V. Garimella, Alwin Takeen |
| 1999 | WCAE | The role of computer technology trends in computer architecture education. | Nihar R. Mahapatra, Alwin Tareen |