A Fast Lock-In Ultra Low-Voltage ADPLL Clock Generator with Adaptive Body Biasing in 22nm FDSOI Technology.
Florian Schraut, Holger Eisenreich, Sebastian Hppner, Christian Mayr
Browse the full ISCAS paper archive.
Florian Schraut, Holger Eisenreich, Sebastian Hppner, Christian Mayr
Browse the full ISCAS paper archive.