A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM.
Ki Chul Chun, Pulkit Jain, Chris H. Kim
Browse the full ISLPED paper archive.
Ki Chul Chun, Pulkit Jain, Chris H. Kim
Browse the full ISLPED paper archive.