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Paper
Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations.
Naoyuki Matsumoto
,
Koji Nakano
,
Yasuaki Ito
Venue
C
ISPDC
Year
2015
Proceedings
ISPDC
DBLP record
conf/ispdc/MatsumotoNI15 ↗
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