Hardware-Assisted Simulation and Evaluation of IP Cores Using FPGA-Based Rapid Prototyping Boards.
Rawat Siripokarpirom, Friedrich Mayer-Lindenberg
VenueCRSP
Year2004
ProceedingsIEEE International Workshop on Rapid System Prototyping
DBLP recordconf/rsp/SiripokarpiromM04 ↗
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