Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs.
Hsiang-Huang Wu, Hojin Kee, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya
VenueCRSP
Year2010
ProceedingsInternational Symposium on Rapid System Prototyping
DBLP recordconf/rsp/WuKSPB10 ↗
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