From Stateflow Simulation to Verified Implementation: A Verification Approach and A Real-Time Train Controller Design.
Yu Jiang, Yixiao Yang, Han Liu, Hui Kong, Ming Gu, Jia-Guang Sun, Lui Sha
Browse the full RTAS paper archive.
Yu Jiang, Yixiao Yang, Han Liu, Hui Kong, Ming Gu, Jia-Guang Sun, Lui Sha
Browse the full RTAS paper archive.