Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
VLSID
/
Paper
Generating Scalable Polynomial Models: Key to Low Power High Performance Designs.
G. Girishankar
,
Shitanshu Tiwari
Venue
National
VLSID
Year
2006
Proceedings
VLSI Design
DBLP record
conf/vlsid/GirishankarT06 ↗
Browse the full
VLSID paper archive
.