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Paper
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes.
Kiran K. Gunnam
,
Gwan S. Choi
,
Mark B. Yeary
Venue
National
VLSID
Year
2007
Proceedings
VLSI Design
DBLP record
conf/vlsid/GunnamCY07 ↗
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