Analytical Drain Current Model of Nanoscale Strained-Si/SiGe MOSFETs for Analog Circuit Simulation.
Mamidala Jagadesh Kumar, Vivek Venkataraman, Susheel Nawal
Browse the full VLSID paper archive.
Mamidala Jagadesh Kumar, Vivek Venkataraman, Susheel Nawal
Browse the full VLSID paper archive.