A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET.
Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev
Browse the full VLSID paper archive.
Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev
Browse the full VLSID paper archive.