Surmounting Challenges in the Design of Low Power Real Time Clock IP for Advanced FinFET Technology Nodes.
Krishnan Sukumar, Santosh Vodnala, Ravindra Ayyagari, Animesh Jain, Thanapandi Ganesan, Rajesh R
Browse the full VLSID paper archive.
Krishnan Sukumar, Santosh Vodnala, Ravindra Ayyagari, Animesh Jain, Thanapandi Ganesan, Rajesh R
Browse the full VLSID paper archive.