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Processing and Scheduling Components in an Innovative Network Processor Architecture.

Kyriakos Vlachos, Nikos A. Nikolaou, Theofanis Orphanoudakis, Stylianos Perissakis, Dionisios N. Pnevmatikatos, George Kornaros, J. A. Sanchez, George E. Konstantoulakis

Year2003
ProceedingsVLSI Design

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