Allocating Physically Aware Embedded Memory Test & Repair Processor using Floorplan Info at the RTL Design Level.
Vinay Kumar, Bhrugurajsinh Chudasama, Bin B. W. Wang, Manish Arora, Bharath Shankaranarayanan
Browse the full VTS paper archive.
Vinay Kumar, Bhrugurajsinh Chudasama, Bin B. W. Wang, Manish Arora, Bharath Shankaranarayanan
Browse the full VTS paper archive.