| 2021 | DSD | Implementation-Independent Test Generation for a Large Class of Faults in RISC Processor Modules. | Maksim Jenihhin, Adeboye Stephen Oyeniran, Jaan Raik, Raimund Ubar |
| 2020 | DSD | Implementation-Independent Functional Test for Transition Delay Faults in Microprocessors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik |
| 2019 | DDECS | New categories of Safe Faults in a processor-based Embedded System. | Cemil Cem Grsoy, Maksim Jenihhin, Adeboye Stephen Oyeniran, Davide Piumatti, Jaan Raik, Matteo Sonza Reorda, Raimund Ubar |
| 2019 | ETS | High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors. | Adeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Cemil Cem Grsoy, Jaan Raik |
| 2019 | IOLTS | Application Specific True Critical Paths Identification in Sequential Circuits. | Lembit Jrimgi, Raimund Ubar, Maksim Jenihhin, Jaan Raik, Sergei Devadze, Adeboye Stephen Oyeniran |
| 2018 | DDECS | Replication-Based Deterministic Testing of 2-Dimensional Arrays with Highly Interrelated Cells. | Siavoosh Payandeh Azad, Adeboye Stephen Oyeniran, Raimund Ubar |
| 2018 | ISCAS | Parallel Pseudo-Exhaustive Testing of Array Multipliers with Data-Controlled Segmentation. | Adeboye Stephen Oyeniran, Siavoosh Payandeh Azad, Raimund Ubar |