Adonios Thanailakis
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
16
Venues
3
Active years
1999–2006
Best venue rank
C
Where they publish
Papers
16 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | ISCAS | A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications. | Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis |
| 2005 | ASPDAC | AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. | Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, Kostas Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis |
| 2005 | FPL | A Low-Energy FPGA: Architecture Design and Software-Supported Design Flow. | Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis |
| 2005 | FPL | An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform. | Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, D. J. Soudris, Adonios Thanailakis |
| 2005 | ISCAS | A modified spiral search motion estimation algorithm and its embedded system implementation. | Nikolas Kroupis, Minas Dasygenis, Kleoniki Markou, Dimitrios Soudris, Adonios Thanailakis |
| 2004 | FPL | A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. | Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis |
| 2003 | FPL | Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms. | Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Adonios Thanailakis |
| 2003 | ISCAS | Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size. | Dimitrios Soudris, Marios Kesoulis, Christos S. Koukourlis, Adonios Thanailakis, Spyros Blionas |
| 2003 | ISCAS | A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems. | Dimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis |
| 2002 | FPL | Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. | George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis |
| 2001 | ISCAS | A CAD tool for architecture level exploration and automatic generation of RNS converters. | D. J. Soudris, Minas Dasygenis, Spyridoula K. Vasilopoulou, Adonios Thanailakis |
| 2001 | ISCAS | The circuit design of multiple-valued logic voltage-mode adders. | Ioannis M. Thoidis, Dimitrios Soudris, Jean-Marc Fernandez, Adonios Thanailakis |
| 2000 | ISCAS | Designing RNS and QRNS full adder based converters. | D. J. Soudris, Minas Dasygenis, Adonios Thanailakis |
| 2000 | ISCAS | Low power design of a multi-mode transceiver. | Dimitrios Soudris, Minas Perakis, Haris Mizas, Vasilios A. Mardiris, Kosfas Katis, Chrissavgi Dre, A. E. Tzimas, E. G. Metaxakis, Grigorios Kalivas, Nikolaos D. Zervas, Spyros Theoharis, George Theodoridis, Adonios Thanailakis, Constantinos E. Goutis |
| 2000 | ISCAS | A methodology for the behavioral-level event-driven power management of digital receivers. | Nikolaos D. Zervas, Dimitrios Soudris, Spyros Theoharis, Constantinos E. Goutis, Adonios Thanailakis |
| 1999 | ISCAS | The VLSI implementation of a baseband receiver for DECT-based portable applications. | M. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, Grigorios A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis |