Adri Armejach
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
21
Venues
15
Active years
2009–2026
Best venue rank
A*
Where they publish
Papers
21 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | CGO | Ember: A Compiler for Embedding Operations on Decoupled Access-Execute Architectures. | Marco Siracusa, Olivia Hsu, Vctor Soria Pardos, Joshua Randall, Arnaud Grasset, Eric Biscondi, Douglas J. Joseph, Randy Allen, Fredrik Kjolstad, Miquel Moret Planas, Adri Armejach |
| 2025 | DSD | FLAMA: Architecting Floating-Point Atomic Memory Operations for Heterogeneous HPC Systems. | Vctor Soria Pardos, Adri Armejach, Daro Surez Gracia, Didier Martinot, Arnaud Grasset, Miquel Moret |
| 2025 | MICRO | A. Delegato: Locality-Aware Atomic Memory Operations on Chiplets. | Vctor Soria Pardos, Adri Armejach, Tiago Mck, Daro Surez Gracia, Jos A. Joao, Miquel Moret |
| 2024 | ICS | Exploiting Vector Code Semantics for Efficient Data Cache Prefetching. | Francesc Martnez Palau, Mart Torrents, Adri Armejach, Marc Casas |
| 2024 | MICRO | A Mess of Memory System Benchmarking, Simulation and Application Profiling. | Pouya Esmaili-Dokht, Francesco Sgherzi, Valria Soldera Girelli, Isaac Boixaderas, Mariana Carmin, Alireza Monemi, Adri Armejach, Estanislao Mercadal, Germn Llort, Petar Radojkovic, Miquel Moret, Judit Gimnez, Xavier Martorell, Eduard Ayguad, Jess Labarta, Emanuele Confalonieri, Rishabh Dubey, Jason Adlard |
| 2023 | DATE | Fast Behavioural RTL Simulation of 10B Transistor SoC Designs with Metro-Mpi. | Guillem Lpez-Parads, Brian Li, Adri Armejach, Stefan Wallentowitz, Miquel Moret, Jonathan Balkind |
| 2023 | ISCA | DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. | Vctor Soria Pardos, Adri Armejach, Tiago Mck, Daro Surez Gracia, Jos A. Joao, Alejandro Rico, Miquel Moret |
| 2023 | MICRO | A Tensor Marshaling Unit for Sparse Tensor Algebra on General-Purpose Processors. | Marco Siracusa, Vctor Soria Pardos, Francesco Sgherzi, Joshua Randall, Douglas J. Joseph, Miquel Moret Planas, Adri Armejach |
| 2023 | PPoPP | Efficient Direct Convolution Using Long SIMD Instructions. | Alexandre de Limas Santana, Adri Armejach, Marc Casas |
| 2022 | ARITH | A BF16 FMA is All You Need for DNN Training. | John Osorio Ros, Adri Armejach, Eric Petit, Greg Henry, Marc Casas |
| 2022 | ISPASS | FASE: A Fast, Accurate and Seamless Emulator for Custom Numerical Formats. | John Osorio Ros, Adri Armejach, Eric Petit, Greg Henry, Marc Casas |
| 2021 | DATE | Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors. | Adri Armejach, Bine Brank, Jordi Cortina, Franois Dolique, Timothy Hayes, Nam Ho, Pierre-Axel Lagadec, Romain Lemaire, Guillem Lpez-Parads, Laurent Marliac, Miquel Moret, Pedro Marcuello, Dirk Pleiter, Xubin Tan, Said Derradji |
| 2021 | ICMLA | Dynamically Adapting Floating-Point Precision to Accelerate Deep Neural Network Training. | John Osorio Ros, Adri Armejach, Eric Petit, Greg Henry, Marc Casas |
| 2021 | ICPP | gem5 + rtl: A Framework to Enable RTL Models Inside a Full-System Simulator. | Guillem Lpez-Parads, Adri Armejach, Miquel Moret |
| 2021 | ICS | PLANAR: a programmable accelerator for near-memory data rearrangement. | Adrin Barredo, Adri Armejach, Jonathan C. Beard, Miquel Moret |
| 2020 | ICMLA | Evaluating Mixed-Precision Arithmetic for 3D Generative Adversarial Networks to Simulate High Energy Physics Detectors. | John Osorio Ros, Adri Armejach, Gulrukh Khattak, Eric Petit, Sofia Vallecorsa, Marc Casas |
| 2016 | SC | MUSA: a multi-level simulation approach for next-generation HPC machines. | Thomas Grass, Csar Allande, Adri Armejach, Alejandro Rico, Eduard Ayguad, Jess Labarta, Mateo Valero, Marc Casas, Miquel Moret |
| 2015 | SBAC-PAD | Tidy Cache: Improving Data Placement in Die-Stacked DRAM Caches. | Adri Armejach, Adrin Cristal, Osman S. Unsal |
| 2014 | FPL | An empirical evaluation of High-Level Synthesis languages and tools for database acceleration. | Oriol Arcas-Abella, Geoffrey Ndu, Nehir Snmez, Mohsen Ghasempour, Adri Armejach, Javier Navaridas, Wei Song, John Mawer, Adrin Cristal, Mikel Lujn |
| 2013 | HiPC | HARP: Adaptive abort recurrence prediction for Hardware Transactional Memory. | Adri Armejach, Anurag Negi, Adrin Cristal, Osman S. Unsal, Per Stenstrm, Tim Harris |
| 2009 | MICRO | EazyHTM: eager-lazy hardware transactional memory. | Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulkarni, Adri Armejach, Adrin Cristal, Osman S. Unsal, Tim Harris, Mateo Valero |