| 2026 | ISCAS | A RISC-V Coprocessor to Accelerate Structured Sparse-Dense Matrix Multiplications. | Rohan Krishna Vijayaraghavan, Ahmed Kamaleldin, Pruthul Pradeep Andy, Diana Ghringer |
| 2026 | ISCAS | MoSim: A Modular Simulation Framework for FPGA-based Systolic CNN Accelerators. | Jin Yuan, Zuwen Ou, Guangjin Li, Ahmed Kamaleldin, Diana Ghringer |
| 2025 | DSD | Towards an Energy-Efficient RISC-V Core Architecture with Dynamic Dual-Issue and Clock Gating. | Ahmad Othman, Hueseyin Ege Pamuk, Ahmed Kamaleldin, Diana Ghringer |
| 2025 | FPL | Towards Instruction-Controlled In-Pipeline GEMM Acceleration in a Dual-Issue RISC-V Core for Edge Applications. | Ahmad Othman, Darmen Ilyas, Ahmed Kamaleldin, Diana Ghringer |
| 2022 | FPL | A Hybrid Memory/Accelerator Tile Architecture for FPGA-based RISC-V Manycore Systems. | Ahmed Kamaleldin, Diana Ghringer |
| 2021 | FPL | Design For Agility: A Modular Reconfigurable Platform for Heterogeneous Many-Core Architectures. | Ahmed Kamaleldin, Diana Ghringer |
| 2017 | ISCAS | Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA. | Ahmed Kamaleldin, Ahmed M. Soliman, Ahmed Nagy, Youssef Gamal, Ahmed Shalash, Yehea Ismail, Hassan Mostafa |