| 2025 | DATE | A High-Performance and Flexible Accelerator for Dynamic Graph Convolutional Networks. | Yingnan Zhao, Ke Wang, Ahmed Louri |
| 2025 | HPCA | I-DGNN: A Graph Dissimilarity-based Framework for Designing Scalable and Efficient DGNN Accelerators. | Jiaqi Yang, Hao Zheng, Ahmed Louri |
| 2025 | ISCA | DiTile-DGNN: An Efficient Accelerator for Distributed Dynamic Graph Neural Network Inference. | Jiaqi Yang, Hao Zheng, Ahmed Louri |
| 2024 | DAC | VITA: ViT Acceleration for Efficient 3D Human Mesh Recovery via Hardware-Algorithm Co-Design. | Shilin Tian, Chase Szafranski, Ce Zheng, Fan Yao, Ahmed Louri, Chen Chen, Hao Zheng |
| 2024 | DAC | An Efficient Hardware Accelerator Design for Dynamic Graph Convolutional Network (DGCN) Inference. | Yingnan Zhao, Ke Wang, Jiaqi Yang, Ahmed Louri |
| 2023 | DAC | Venus: A Versatile Deep Neural Network Accelerator Architecture Design for Multiple Applications. | Jiaqi Yang, Hao Zheng, Ahmed Louri |
| 2023 | ICCAD | ARIES: Accelerating Distributed Training in Chiplet-Based Systems via Flexible Interconnects. | Lingxiang Yin, Amir Ghazizadeh, Ahmed Louri, Hao Zheng |
| 2023 | ICCD | Polyform: A Versatile Architecture for Multi-DNN Execution via Spatial and Temporal Acceleration. | Lingxiang Yin, Amir Ghazizadeh, Shilin Tian, Ahmed Louri, Hao Zheng |
| 2023 | ISCA | Flumen: Dynamic Processing in the Photonic Interconnect. | Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri |
| 2022 | DATE | AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems. | Ke Wang, Hao Zheng, Yuan Li, Jiajun Li, Ahmed Louri |
| 2022 | HPCA | SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference. | Yuan Li, Ahmed Louri, Avinash Karanth |
| 2022 | ICCD | FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture. | Yingnan Zhao, Ke Wang, Ahmed Louri |
| 2021 | DAC | Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects. | Yuan Li, Ahmed Louri, Avinash Karanth |
| 2021 | HPCA | Adapt-NoC: A Flexible Network-on-Chip Design for Heterogeneous Manycore Architectures. | Hao Zheng, Ke Wang, Ahmed Louri |
| 2021 | HPCA | CSCNN: Algorithm-hardware Co-design for CNN Accelerators using Centrosymmetric Filters. | Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu |
| 2021 | HPCA | GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Networks. | Jiajun Li, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu |
| 2021 | ISCA | Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics. | Kyle Shiflett, Avinash Karanth, Razvan C. Bunescu, Ahmed Louri |
| 2020 | DAC | A Versatile and Flexible Chiplet-based System Design for Heterogeneous Manycore Architectures. | Hao Zheng, Ke Wang, Ahmed Louri |
| 2020 | HPCA | PIXEL: Photonic Neural Network Accelerator. | Kyle Shiflett, Dylan Wright, Avinash Karanth, Ahmed Louri |
| 2019 | DAC | An Energy-Efficient Network-on-Chip Design using Reinforcement Learning. | Hao Zheng, Ahmed Louri |
| 2019 | DATE | High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin. | Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu |
| 2019 | ISCA | IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycores. | Ke Wang, Ahmed Louri, Avinash Karanth, Razvan C. Bunescu |
| 2019 | ICS | An online quality management framework for approximate communication in network-on-chips. | Yuechen Chen, Ahmed Louri |
| 2018 | DAC | LEAD: learning-enabled energy-aware dynamic voltage/frequency scaling in NoCs. | Mark Clark, Avinash Kodi, Razvan C. Bunescu, Ahmed Louri |
| 2018 | HPCA | Extending the Power-Efficiency and Performance of Photonic Interconnects for Heterogeneous Multicores with Machine Learning. | Scott Van Winkle, Avinash Karanth Kodi, Razvan C. Bunescu, Ahmed Louri |
| 2018 | ICCD | DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs. | Yuechen Chen, Md Farhadur Reza, Ahmed Louri |
| 2017 | DATE | Machine learning enabled power-aware Network-on-Chip design. | Dominic DiTomaso, Md. Ashif I. Sikder, Avinash Karanth Kodi, Ahmed Louri |
| 2016 | MICRO | Dynamic error mitigation in NoCs using intelligent prediction techniques. | Dominic DiTomaso, Travis Boraten, Avinash Kodi, Ahmed Louri |
| 2015 | HOTI | OWN: Optical and Wireless Network-on-Chip for Kilo-core Architectures. | Md. Ashif I. Sikder, Avinash Karanth Kodi, Matthew Kennedy, Savas Kaya, Ahmed Louri |
| 2014 | HPCA | QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers. | Dominic DiTomaso, Avinash Karanth Kodi, Ahmed Louri |
| 2013 | SBAC-PAD | Tackling Permanent Faults in the Network-on-Chip Router Pipeline. | Pavan Poluri, Ahmed Louri |
| 2012 | ICCD | 3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores. | Randy Morris, Avinash Karanth Kodi, Ahmed Louri |
| 2012 | MICRO | Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. | Randy Morris, Avinash Karanth Kodi, Ahmed Louri |
| 2011 | ICCAD | Co-design of channel buffers and crossbar organizations in NoCs architectures. | Avinash Karanth Kodi, Randy Morris, Dominic DiTomaso, Ashwini Sarathy, Ahmed Louri |
| 2011 | MICRO | ROBUST: a new self-healing fault-tolerant NoC router. | Jacques Henri Collet, Ahmed Louri, Vivek Tulsidas Bhat, Pavan Poluri |
| 2010 | ASPDAC | Workload capacity considering NBTI degradation in multi-core systems. | Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang |
| 2010 | DAC | A multilayer nanophotonic interconnection network for on-chip many-core communications. | Xiang Zhang, Ahmed Louri |
| 2009 | ASPDAC | Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang |
| 2008 | ISCA | iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. | Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri |
| 2007 | HOTI | Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators. | Chander Kochar, Avinash Karanth Kodi, Ahmed Louri |
| 2007 | SC | Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. | Avinash Karanth Kodi, Ahmed Louri |
| 2006 | HOTI | A New Dynamic Bandwidth Re-Allocation Technique in Optically Interconnected High-Performance Computing Systems. | Avinash Karanth Kodi, Ahmed Louri |
| 2004 | HOTI | Design of a high-speed optical interconnect for scalable shared memory multiprocessors. | Avinash Karanth Kodi, Ahmed Louri |
| 1998 | ICPP | Media Access Protocols For A Scalable Optical Interconnection Network. | Thomas S. Jones, Ahmed Louri |
| 1993 | ICPP | Performance Considerations Relating to the Design of Interconnection Networks for Multiprocessing Systems. | Earl Hokens, Ahmed Louri |
| 1992 | ICPP | A Compiler Directed Cache Coherence Scheme with Fast and Parallel Explicit Invalidation. | Ahmed Louri, Hongki Sung |
| 1992 | ISCA | Parallel electro-optical rule-based system for fast execution of expert systems. | Ahmed Louri, Jongwhoa Na |
| 1992 | ISCA | A new compiler-directed cache coherence scheme for shared memory multiprocessors with fast and parallel explicit invalidation. | Ahmed Louri, Hongki Sung |
| 1991 | ICPP | Design and Evaluation of Fault-Tolerant Interleaved Memory Systems. | Sy-Yen Kuo, Ahmed Louri, Sheng-Chiech Liang |
| 1988 | ICPP | Optical Arithmetic Using Signed-Digit Symbolic Substitution. | Kai Hwang, Ahmed Louri |
| 1988 | ISCA | A Bit-Plane Architecture for Optical Computing with Two-Dimensional Symbolic Substitution. | Ahmed Louri, Kai Hwang |