Ajith Sivadasan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
2016–2018
Best venue rank
A
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | DATE | NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI. | Ajith Sivadasan, Riddhi Jitendrakumar Shah, Vincent Huard, Florian Cacho, Lorena Anghel |
| 2017 | DATE | Workload dependent reliability timing analysis flow. | Ajith Sivadasan, Armelle Notin, Vincent Huard, Etienne Maurin, Souhir Mhira, Florian Cacho, Lorena Anghel |
| 2016 | DATE | Study of workload impact on BTI HCI induced aging of digital circuits. | Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel |
| 2016 | DATE | Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis. | Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel |
| 2016 | IOLTS | Activity profiling: Review of different solutions to develop reliable and performant design. | Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel |
| 2016 | VTS | Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results. | Lorena Anghel, Ahmed Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard |