Ajoy Kumar Palit
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
1999–2015
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | DDECS | TPG for Crosstalk Faults between On-Chip Aggressor and Victim Using Genetic Algorithms. | Kishore K. Duganapalli, Ajoy Kumar Palit, Walter Anheier |
| 2010 | DDECS | Fault diagnosis of crosstalk induced glitches and delay faults. | Shehzad Hasan, Ajoy Kumar Palit, Walter Anheier |
| 2010 | VLSID | Test Pattern Generation and Compaction for Crosstalk Induced Glitches and Delay Faults. | Shehzad Hasan, Ajoy Kumar Palit, Walter Anheier |
| 2007 | DDECS | XSIM: An Efficient Crosstalk Simulator for Analysis and Modeling of Signal Integrity Faults in Both Defective and Defect-free Interconnects. | Ajoy Kumar Palit, Kishore K. Duganapalli, Walter Anheier |
| 2005 | VLSID | ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips. | Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jrgen Schlffel |
| 1999 | IJCNN | Forecasting chaotic time series using neuro-fuzzy approach. | Ajoy Kumar Palit, Dobrivoje Popovic |