| 2022 | PDCAT | Memory Access Optimization for Former Process of Pencil Drawing Style Image Conversion in High-Level Synthesis. | Honoka Tani, Akira Yamawaki |
| 2021 | Tencon | Omnidirectional Background Scrolling in High-Level Synthesis Oriented Game Programing Library. | Kilryong Lee, Akira Yamawaki |
| 2021 | Tencon | Development of High Performance Hardware by High-Level Synthesis of Median-Based Dynamic Background Subtraction Method with Multiple Line Buffers. | Kohei Shinyamada, Akira Yamawaki |
| 2019 | PDCAT | Development of Filled Circle Drawing in High-Level Synthesis Oriented Game Programming Library. | Yuki Yamagata, Akira Yamawaki |
| 2019 | PDCAT | Effect of Parallel Processing by Duplicating Histogram in Automatic Image Binarization for High-Level Synthesis. | Moena Yamasaki, Akira Yamawaki |
| 2018 | ISITA | An Upper Bound on the Generalized Cayley Distance. | Akira Yamawaki, Hiroshi Kamabe, Shan Lu |
| 2018 | Tencon | An Evaluation of Burst Transfer Inferred by a High-level Synthesis Tool. | Yuki Yamagata, Akira Yamawaki |
| 2018 | Tencon | Describing Methods for High-level Synthesis of Histogram Generation and Their Evaluation. | Moena Yamawasaki, Akira Yamawaki |
| 2017 | ISIT | Construction of unrestricted-rate parallel random input-output code. | Shan Lu, Hiroshi Kamabe, Jun Cheng, Akira Yamawaki |
| 2017 | ISIT | Lower bounds on the number of write operations by index-less indexed flash code with inversion cells. | Akira Yamawaki, Hiroshi Kamabe, Shan Lu |
| 2017 | ITW | Construction of parallel RIO codes using coset coding with hamming codes. | Akira Yamawaki, Hiroshi Kamabe, Shan Lu |
| 2016 | ISITA | Maximization of average number of rewriting of ILIFC with inversion operation. | Akira Yamawaki, Hiroshi Kamabe |
| 2013 | ISCAS | Underwater optical image dehazing using guided trigonometric bilateral filtering. | Huimin Lu, Yujie Li, Lifeng Zhang, Akira Yamawaki, Shiyuan Yang, Seiichi Serikawa |
| 2010 | ICCSA | An Efficient Hardware Architecture from C Program with Memory Access to Hardware. | Akira Yamawaki, Seiichi Serikawa, Masahiko Iwane |
| 2009 | FPGA | An intermediate hardware model with load/store unit for C to FPGA. | Akira Yamawaki, Masahiko Iwane |
| 2007 | ICPADS | An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip. | Akira Yamawaki, Masahiko Iwane |
| 2002 | ICPADS | Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip. | Akira Yamawaki, Masahiko Iwane |