| 1995 | DAC | A Fast State Assignment Procedure for Large FSMs. | Shihming Liu, Massoud Pedram, Alvin M. Despain |
| 1995 | ISCAS | PLATO P: PLA Timing Optimization by Partitioning. | Shihming Liu, Massoud Pedram, Alvin M. Despain |
| 1995 | ISCAS | 190-MHz CMOS 4-Kbyte Pipelined Caches. | Apoorv Srivastava, Yong-Seon Koh, Barton Sano, Alvin M. Despain |
| 1995 | ISLPED | Cache design trade-offs for power and performance optimization: a case study. | Ching-Long Su, Alvin M. Despain |
| 1994 | COMPSAC | Hardware-software co-designing benchmark-driven superpipelined instruction set processors. | Ching-Long Su, Alvin M. Despain |
| 1994 | DAC | Synthesis of Instruction Sets for Pipelined Microprocessors. | Ing-Jer Huang, Alvin M. Despain |
| 1994 | DAC | Exact and Approximate Methods for Calculating Signal and Transition Probabilities in FSMs. | Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain |
| 1994 | ICCAD | Generating instruction sets and microarchitectures from applications. | Ing-Jer Huang, Alvin M. Despain |
| 1994 | ICCAD | Low power state assignment targeting two-and multi-level logic implementations. | Chi-Ying Tsui, Massoud Pedram, Chih-Ang Chen, Alvin M. Despain |
| 1994 | ICPADS | A Study of Cache Hashing Functions for Symbolic Applications in Micro-Parallel Processors. | Ching-Long Su, Chin-Chi Teng, Alvin M. Despain |
| 1994 | ISCA | Branch with Masked Squashing in Superpipelined Processors. | Ching-Long Su, Alvin M. Despain |
| 1994 | MICRO | Minimizing branch misprediction penalties for superpipelined processors. | Ching-Long Su, Alvin M. Despain |
| 1993 | DAC | Technology Decomposition and Mapping Targeting Low Power Dissipation. | Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain |
| 1993 | ICCAD | Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors. | Ing-Jer Huang, Alvin M. Despain |
| 1993 | ICCAD | Efficient estimation of dynamic power consumption under a real delay model. | Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain |
| 1993 | MICRO | An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. | Ing-Jer Huang, Alvin M. Despain |
| 1993 | MICRO | The 16-fold way: a microparallel taxonomy. | Barton Sano, Alvin M. Despain |
| 1993 | MICRO | Prophetic branches: a branch architecture for code compaction and efficient execution. | Apoorv Srivastava, Alvin M. Despain |
| 1992 | DAC | High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers. | Ing-Jer Huang, Alvin M. Despain |
| 1992 | DAC | Application-Driven Design Automation for Microprocessor Design. | Iksoo Pyo, Ching-Long Su, Ing-Jer Huang, Kuo-Rueih Pan, Yong-Seon Koh, Chi-Ying Tsui, Hsu-Tsun Chen, Gino Cheng, Shihming Liu, Shiqun Wu, Alvin M. Despain |
| 1991 | IJCAI | AI and Design. | Saul Amarel, Alvin M. Despain, H. Penny Nii, Louis I. Steinberg, Marty Tenenbaum, Peter M. Will |
| 1991 | MICRO | Viewing Instruction Set Design as an Optimization Problem. | Bruce K. Holmer, Alvin M. Despain |
| 1990 | ISCA | Fast Prolog with an Extended General Purpose Architecture. | Bruce K. Holmer, Barton Sano, Michael J. Carlton, Peter Van Roy, Ralph Clarke Haygood, William R. Bush, Alvin M. Despain, Joan M. Pendleton, Tep P. Dobry |
| 1988 | ICS | A two-tier memory architecture for high-performance multiprocessor systems. | Tam M. Nguyen, Vason P. Srini, Alvin M. Despain |
| 1987 | ISCA | Performance Studies of a Parallel Prolog Architecture. | Barry S. Fagin, Alvin M. Despain |
| 1986 | DAC | Delay reduction using simulated annealing. | Jonathan D. Pincus, Alvin M. Despain |
| 1986 | ISCA | Multiprocessor Cache Synchronization: Issues, Innovations, Evolution. | Philip Bitar, Alvin M. Despain |
| 1985 | ISCA | Performance Studies of a Prolog Machine Architecture. | Tep P. Dobry, Alvin M. Despain, Yale N. Patt |
| 1985 | MICRO | Compiling Prolog into microcode: a case study using the NCR/32-000. | Barry S. Fagin, Yale N. Patt, Vason P. Srini, Alvin M. Despain |
| 1984 | MICRO | Design decisions influencing the microarchitecture for a Prolog machine. | Tep P. Dobry, Yale N. Patt, Alvin M. Despain |
| 1978 | ISCA | X-Tree: A Tree Structured Multi-Processor Computer Architecture. | Alvin M. Despain, David A. Patterson |